Contains

Submission Date: 2024/12/26 17:45:51

Status: Accepted

Author: muebayashi

Lines: 209

VSM

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#-----------------------------------------------------------------------
# 事前処理部
#-----------------------------------------------------------------------
lpackbit $mabid $ls0 $t  
# $mabid と $ls0 のビットをパック（結合）し、その結果を $t に格納 (ビット操作)
lpassa $llm0v   $llr0v     
# $llm0v の値を $llr0v へパス (単純なレジスタ渡し)  
lpassa $llm16v  $llr16v    
# $llm16v の値を $llr16v へパス  
#-----------------------------------------------------------------------
# 以降、16 回の繰り返しブロック (0,2,4,...,30) で XOR・最小値演算などを実行
#-----------------------------------------------------------------------
# --- 1ブロック目 (対象レジスタ: $lr0) ---
lxor  $lr0 $ln0v  $lr32v     
# $lr0 と $ln0v の排他的論理和 (XOR) → 結果を $lr32v に格納
lxor  $lr0 $ln8v  $nowrite   
# $lr0 と $ln8v を XOR (結果は書き戻さない)
ulmin $aluf $lr32v $lr40v    
# $lr32v と $lr40v の符号なし最小値 → ALU 内部 ($aluf) に格納
lxor  $lr0 $ln16v $lr48v     
# $lr0 と $ln16v を XOR → 結果を $lr48v
lxor  $lr0 $ln24v $nowrite   
# $lr0 と $ln24v を XOR (書き戻しなし)
ulmin $aluf $lr48v $nowrite  
# $lr48v と ALU内部($aluf) の符号なし最小値 → ALU内部に更新 (書き戻しなし)
ulmin $aluf $lr40v $nowrite  
# $lr40v と ALU内部値 の符号なし最小値 → ALU内部に更新 (書き戻しなし)
l1bmrland $aluf $lb0        
# L1バッファ読み込み時、$aluf と AND して $lb0 に反映 (推測)
nop                          
nop                          
# 何もしない命令2連 (パイプライン調整や待機等)
l1bmp $llb0  $llm32v        
# l1b バッファ操作？ (l1bmp) コマンド: $llb0 の内容を $llm32v へ書き込み (推測)
l1bmp $llb8  $llm48v        
# 同様に $llb8 の内容を $llm48v へ書き込み
# --- 2ブロック目 (対象レジスタ: $lr2) ---
lxor  $lr2 $ln0v  $lr32v
lxor  $lr2 $ln8v  $nowrite
ulmin $aluf $lr32v $lr40v
lxor  $lr2 $ln16v $lr48v
lxor  $lr2 $ln24v $nowrite
ulmin $aluf $lr48v $nowrite
ulmin $aluf $lr40v $nowrite
l1bmrland $aluf $lb0
nop
nop
l1bmp $llb0  $llm64v
l1bmp $llb8  $llm80v
# --- 3ブロック目 (対象レジスタ: $lr4) ---
lxor  $lr4 $ln0v  $lr32v
lxor  $lr4 $ln8v  $nowrite
ulmin $aluf $lr32v $lr40v
lxor  $lr4 $ln16v $lr48v
lxor  $lr4 $ln24v $nowrite
ulmin $aluf $lr48v $nowrite
ulmin $aluf $lr40v $nowrite
l1bmrland $aluf $lb0
nop
nop
l1bmp $llb0  $llm96v
l1bmp $llb8  $llm112v
# --- 4ブロック目 (対象レジスタ: $lr6) ---
lxor  $lr6 $ln0v  $lr32v
lxor  $lr6 $ln8v  $nowrite
ulmin $aluf $lr32v $lr40v
lxor  $lr6 $ln16v $lr48v
lxor  $lr6 $ln24v $nowrite
ulmin $aluf $lr48v $nowrite
ulmin $aluf $lr40v $nowrite
l1bmrland $aluf $lb0
nop
nop
l1bmp $llb0  $llm128v
l1bmp $llb8  $llm144v
# --- 5ブロック目 (対象レジスタ: $lr8) ---
lxor  $lr8 $ln0v  $lr32v
lxor  $lr8 $ln8v  $nowrite
ulmin $aluf $lr32v $lr40v
lxor  $lr8 $ln16v $lr48v
lxor  $lr8 $ln24v $nowrite
ulmin $aluf $lr48v $nowrite
ulmin $aluf $lr40v $nowrite
l1bmrland $aluf $lb0
nop
nop
l1bmp $llb0  $llm160v
l1bmp $llb8  $llm176v
# --- 6ブロック目 (対象レジスタ: $lr10) ---
lxor  $lr10 $ln0v  $lr32v
lxor  $lr10 $ln8v  $nowrite
ulmin $aluf $lr32v $lr40v
lxor  $lr10 $ln16v $lr48v
lxor  $lr10 $ln24v $nowrite
ulmin $aluf $lr48v $nowrite
ulmin $aluf $lr40v $nowrite
l1bmrland $aluf $lb0
nop
nop
l1bmp $llb0  $llm192v
l1bmp $llb8  $llm208v
# --- 7ブロック目 (対象レジスタ: $lr12) ---
lxor  $lr12 $ln0v  $lr32v
lxor  $lr12 $ln8v  $nowrite
ulmin $aluf $lr32v $lr40v
lxor  $lr12 $ln16v $lr48v
lxor  $lr12 $ln24v $nowrite
ulmin $aluf $lr48v $nowrite
ulmin $aluf $lr40v $nowrite
l1bmrland $aluf $lb0
nop
nop
l1bmp $llb0  $llm224v
l1bmp $llb8  $llm240v
# --- 8ブロック目 (対象レジスタ: $lr14) ---
lxor  $lr14 $ln0v  $lr32v
lxor  $lr14 $ln8v  $nowrite
ulmin $aluf $lr32v $lr40v
lxor  $lr14 $ln16v $lr48v
lxor  $lr14 $ln24v $nowrite
ulmin $aluf $lr48v $nowrite
ulmin $aluf $lr40v $nowrite
l1bmrland $aluf $lb0
nop
nop
l1bmp $llb0  $llm256v
l1bmp $llb8  $llm272v
# --- 9ブロック目 (対象レジスタ: $lr16) ---
lxor  $lr16 $ln0v  $lr32v
lxor  $lr16 $ln8v  $nowrite
ulmin $aluf $lr32v $lr40v
lxor  $lr16 $ln16v $lr48v
lxor  $lr16 $ln24v $nowrite
ulmin $aluf $lr48v $nowrite
ulmin $aluf $lr40v $nowrite
l1bmrland $aluf $lb0
nop
nop
l1bmp $llb0  $llm288v
l1bmp $llb8  $llm304v
# --- 10ブロック目 (対象レジスタ: $lr18) ---
lxor  $lr18 $ln0v  $lr32v
lxor  $lr18 $ln8v  $nowrite
ulmin $aluf $lr32v $lr40v
lxor  $lr18 $ln16v $lr48v
lxor  $lr18 $ln24v $nowrite
ulmin $aluf $lr48v $nowrite
ulmin $aluf $lr40v $nowrite
l1bmrland $aluf $lb0
nop
nop
l1bmp $llb0  $llm320v
l1bmp $llb8  $llm336v
# --- 11ブロック目 (対象レジスタ: $lr20) ---
lxor  $lr20 $ln0v  $lr32v
lxor  $lr20 $ln8v  $nowrite
ulmin $aluf $lr32v $lr40v
lxor  $lr20 $ln16v $lr48v
lxor  $lr20 $ln24v $nowrite
ulmin $aluf $lr48v $nowrite
ulmin $aluf $lr40v $nowrite
l1bmrland $aluf $lb0
nop
nop
l1bmp $llb0  $llm352v
l1bmp $llb8  $llm368v
# --- 12ブロック目 (対象レジスタ: $lr22) ---
lxor  $lr22 $ln0v  $lr32v
lxor  $lr22 $ln8v  $nowrite
ulmin $aluf $lr32v $lr40v
lxor  $lr22 $ln16v $lr48v
lxor  $lr22 $ln24v $nowrite
ulmin $aluf $lr48v $nowrite
ulmin $aluf $lr40v $nowrite
l1bmrland $aluf $lb0
nop
nop
l1bmp $llb0  $llm384v
l1bmp $llb8  $llm400v
# --- 13ブロック目 (対象レジスタ: $lr24) ---
lxor  $lr24 $ln0v  $lr32v
lxor  $lr24 $ln8v  $nowrite
ulmin $aluf $lr32v $lr40v
lxor  $lr24 $ln16v $lr48v
lxor  $lr24 $ln24v $nowrite
ulmin $aluf $lr48v $nowrite
ulmin $aluf $lr40v $nowrite
l1bmrland $aluf $lb0
nop
nop
l1bmp $llb0  $llm416v
l1bmp $llb8  $llm432v
# --- 14ブロック目 (対象レジスタ: $lr26) ---
lxor  $lr26 $ln0v  $lr32v
lxor  $lr26 $ln8v  $nowrite
ulmin $aluf $lr32v $lr40v
lxor  $lr26 $ln16v $lr48v
lxor  $lr26 $ln24v $nowrite
ulmin $aluf $lr48v $nowrite
ulmin $aluf $lr40v $nowrite
l1bmrland $aluf $lb0
nop
nop
l1bmp $llb0  $llm448v
l1bmp $llb8  $llm464v
# --- 15ブロック目 (対象レジスタ: $lr28) ---
lxor  $lr28 $ln0v  $lr32v
lxor  $lr28 $ln8v  $nowrite
ulmin $aluf $lr32v $lr40v
lxor  $lr28 $ln16v $lr48v
lxor  $lr28 $ln24v $nowrite
ulmin $aluf $lr48v $nowrite
ulmin $aluf $lr40v $nowrite
l1bmrland $aluf $lb0
nop
nop
l1bmp $llb0  $llm480v
l1bmp $llb8  $llm496v
# --- 16ブロック目 (対象レジスタ: $lr30) ---
lxor  $lr30 $ln0v  $lr32v
lxor  $lr30 $ln8v  $nowrite
ulmin $aluf $lr32v $lr40v
lxor  $lr30 $ln16v $lr48v
lxor  $lr30 $ln24v $nowrite
ulmin $aluf $lr48v $nowrite
ulmin $aluf $lr40v $nowrite
l1bmrland $aluf $lb0
nop
nop
l1bmp $llb0  $llm512v
l1bmp $llb8  $llm528v
nop
nop
# さらに2つのNOP命令 (パイプライン遅延やステージング用)
#-----------------------------------------------------------------------
# 後処理部
#-----------------------------------------------------------------------
l1bmrland $lmt32v32   $lbi  
l1bmm     $lbi        $ls32v
# L1バッファ読み取り時に $lmt32v32 と AND → $lbi に格納、その後 $lbi を $ls32v に書き込む
l1bmrland $lmt160v32  $lbi
l1bmm     $lbi        $ls40v
l1bmrland $lmt288v32  $lbi
l1bmm     $lbi        $ls48v
l1bmrland $lmt416v32  $lbi
l1bmm     $lbi        $ls56v
# ビット反転命令 (NOT)
llnot $ls32v $ln32v  
# $ls32v をビット反転し、その結果を $ln32v に格納
llnot $ls40v $ln40v
llnot $ls48v $ln48v
llnot $ls56v $ln56v
 
 
הההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההה
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

Standard Output

1
ACCEPTED!! score=209 j=209 m=0 bytes=4565
 
 
הההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההה
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

Standard Error

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------------------- vsm --------------------
# ======= In(0): ((8_L2B:1, 8_L1B:1, 16:1))@LM0 / ULong =======
d set $lm0n0c0b0 1 000000000000002F # values=[47] / ULong @[0]
d set $lm2n0c0b0 1 0000000000000066 # values=[102] / ULong @[1]
d set $lm4n0c0b0 1 000000000000029E # values=[670] / ULong @[2]
d set $lm6n0c0b0 1 0000000000000100 # values=[256] / ULong @[3]
d set $lm8n0c0b0 1 0000000000000021 # values=[33] / ULong @[4]
d set $lm10n0c0b0 1 0000000000000305 # values=[773] / ULong @[5]
d set $lm12n0c0b0 1 00000000000003B9 # values=[953] / ULong @[6]
d set $lm14n0c0b0 1 00000000000002F3 # values=[755] / ULong @[7]
d set $lm16n0c0b0 1 000000000000035B # values=[859] / ULong @[8]
d set $lm18n0c0b0 1 0000000000000160 # values=[352] / ULong @[9]
d set $lm20n0c0b0 1 00000000000000F4 # values=[244] / ULong @[10]
d set $lm22n0c0b0 1 000000000000005D # values=[93] / ULong @[11]
d set $lm24n0c0b0 1 00000000000003A2 # values=[930] / ULong @[12]
d set $lm26n0c0b0 1 0000000000000085 # values=[133] / ULong @[13]
d set $lm28n0c0b0 1 00000000000002B0 # values=[688] / ULong @[14]
d set $lm30n0c0b0 1 000000000000004C # values=[76] / ULong @[15]
d set $lm0n0c0b1 1 0000000000000240 # values=[576] / ULong @[16]
d set $lm2n0c0b1 1 0000000000000072 # values=[114] / ULong @[17]
d set $lm4n0c0b1 1 000000000000017A # values=[378] / ULong @[18]
d set $lm6n0c0b1 1 00000000000000FF # values=[255] / ULong @[19]
d set $lm8n0c0b1 1 000000000000030A # values=[778] / ULong @[20]
d set $lm10n0c0b1 1 000000000000011C # values=[284] / ULong @[21]
d set $lm12n0c0b1 1 0000000000000187 # values=[391] / ULong @[22]
d set $lm14n0c0b1 1 0000000000000128 # values=[296] / ULong @[23]
 
 
הההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההה
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX