Count Up

Submission Date: 2024/9/21 3:04:02
Status: Accepted
Author: dyktr_06
Lines: 33

VSM

imm f"8192" $r[2,3]/1100
imm f"1.0" $ls32v; fvadd $aluf $aluf $r[4,5]
imm i"5" $ln132v; fvadd $r[2,3] $mauf $r[6,7]
imm i"8" $ln156v; fvadd $lr[10,12,14] $ls32 $lr[10,12,14]
imm i"10" $ln172v; fvadd $r1v2 $s32 $r1v2
imm i"15" $lr212v; fvadd $lr8v $ls32v $nowrite
fftoi $mauf $lr100v
# pe*4 -> mab*16 -> l1bm*8 -> l2bm*8
# l2bid * 32 + (l1bid // 2) * 256 + (mabid // 4) * 1024 + (peid % 16) * 2
ilsl $l2bid $ln132 $ls200v
iand $peid $lr212 $nowrite
ilsl $aluf $lr100 $ls208v
ilsr $mabid $lr102 $nowrite
ilsl $aluf $ln172 $ls216v; fvadd $lr0v $ls32v $nowrite
fftoi $mauf $ls232v
ilsr $l1bid $lr100 $nowrite
ilsl $aluf $ln156 $nowrite
iadd $aluf $ls232v $nowrite
iadd $aluf $ls200v $nowrite
iadd $aluf $ls208v $nowrite
iadd $aluf $ls216v $lr0v
l1bmd $aluf $lb0; imm i"4096" $nowrite
iadd $lr0v $aluf $nowrite
l1bmd $aluf $lb256
l2bmr2iband $lb0 $lc0
l2bmr2iband $lb64 $lc512
l2bmr2iband $lb128 $lc1024
l2bmr2iband $lb192 $lc1536
l2bmr2iband $lb256 $lc256
l2bmr2iband $lb320 $lc768
l2bmr2iband $lb384 $lc1280
l2bmr2iband $lb448 $lc1792
nop
mvd/n2048 $lc0 $p0@0
mvp/n16384 $p0@0 $d0@0
הההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההה
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Standard Output

ACCEPTED!! score=33 j=31 m=2 bytes=968
הההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההה
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

Standard Error

------------------- vsm --------------------
imm f"8192" $r[2,3]/1100
imm f"1.0" $ls32v; fvadd $aluf $aluf $r[4,5]
imm i"5" $ln132v; fvadd $r[2,3] $mauf $r[6,7]
imm i"8" $ln156v; fvadd $lr[10,12,14] $ls32 $lr[10,12,14]
imm i"10" $ln172v; fvadd $r1v2 $s32 $r1v2
imm i"15" $lr212v; fvadd $lr8v $ls32v $nowrite
fftoi $mauf $lr100v
# pe*4 -> mab*16 -> l1bm*8 -> l2bm*8
# l2bid * 32 + (l1bid // 2) * 256 + (mabid // 4) * 1024 + (peid % 16) * 2
ilsl $l2bid $ln132 $ls200v
iand $peid $lr212 $nowrite
ilsl $aluf $lr100 $ls208v
ilsr $mabid $lr102 $nowrite
ilsl $aluf $ln172 $ls216v; fvadd $lr0v $ls32v $nowrite
fftoi $mauf $ls232v
ilsr $l1bid $lr100 $nowrite
ilsl $aluf $ln156 $nowrite
iadd $aluf $ls232v $nowrite
 
 
הההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההה
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