Count Up

Submission Date: 2024/9/27 20:47:59

Status: Accepted

Author: logicmachine

Lines: 24

VSM

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# step     : 3 (12-15)
# peid_hi  : 2 (10-12)
# l1bid_hi : 2 (8-10)
# l2bid    : 3 (5-8)
# l1bid_lo : 1 (4-5)
# peid_lo  : 3 (1-4)
# word     : 1 (0-1)
# 0:
# $r[0-5] = 0xcc0e0006
imm      ui"0xcc0e0006" $lr0v/1110
# 1:
# ALU:  $aluf = $peid << 6
# L1BM: $lbi  = 1
# MAU:  $omr1 = 0x5555
ilsl     $peid  $aluf   $nowrite   ; l1bmrior   $aluf $lb0 ;                           ; hvpassar $aluf $omr1             ; hmwrite      $aluf $llx0
# 2:
# ALU:  $lt     = ($peid << 6) | $peid
# L1BM: $s[0-3] = 1
#       $lr4    = 0xcc0e0006_00000001
ior      $peid  $aluf   $lt        ;                       ; l1bmm $lbi $ls0v/1100 $r5 ;                                  ; hmwrite      $llr0 $llx8
# 3:
# ALU:  $aluf   = $l1bid >>> 1
# L1BM: $lbi    = 1 << 4
# MAU:  $lr4    = 0xcc0e0000_000000001
#       $s[4-5] = 0x0000cc0e (peid_mask)
ibsr     $l1bid $lbf    $nowrite   ; l1bmriiadd $lbf  $lbi ;                           ; hvpassar $lm0  $r[4,6,6,6]/$imr1 ; hmread/$imr1 $llx0 $ls4
# 4:
# ALU:  $ls8  = $l2bid << 1 | ($l1bid & 1)
# L1BM: $lbi  = l1bid_hi << 4
#       $lbf  = 1 << 4
# MAU:  $omr2 = 0x3333
ipackbit $l2bid $aluf   $ls8/1000  ; l1bmriiadd $aluf $lbi ; l1bmm $lbi $nowrite       ; fvpassa  $lr0e $omr2
# 5:
# ALU:  $lt   = ($peid << 7) | ($peid << 1)
# L1BM: $lbi  = 1 << 8
#       $lbf  = l1bid_hi << 4
# MAU:  $mauf = 0x????????_00000002
ipackbit $lt    $lm0    $lt        ; l1bmriiadd $lbf  $lbi ; l1bmm $lbi $nowrite       ; dvmulu   $lr4  $lr4         $nowrite
# 6:
# ALU:  $aluf   = (l1bid_hi << 4) | ($l2bid << 1) | l1bid_lo
# L1BM: $r[6-7] = 1 << 8
# MAU:  $s3     = 2
ior      $ls8   $lbf    $nowrite   ;                       ; l1bmm $lbi $lr[6,8,8,8]   ; dvfmad   $lr4  $lr4  $mauf  $ls[2,6,6,6]/$imr2
# 7:
# ALU:  $aluf = (($peid << 7) | ($peid << 1)) & peid_mask (= (peid_hi << 10) | (peid_lo << 1))
# L1BM: $lbi  = (l1bid_hi << 8) | ($l2bid << 5) | (l1bid_lo << 4)
iand     $lt    $ls4    $nowrite   ; l1bmriiadd $aluf $lbi
# 8:
# ALU:  $aluf = ((peid_hi << 10) | (peid_lo << 1)) + word
# L1BM: $lbi  = 1 << 12
#       $lbf  = (l1bid_hi << 8) | ($l2bid << 5) | (l1bid_lo << 4)
iadd     $aluf  $ls2    $nowrite   ; l1bmriiadd $lr6  $lbi ; l1bmm $lbi $nowrite
# 9:
# ALU:  $aluf = (((peid_hi << 10) | (l1bid_hi << 8) | ($l2bid << 5) | (l1bid_lo << 4) | (peid_lo << 1)) + word
# L1BM: $lt   = 1 << 12
iadd     $aluf  $lbf    $nowrite   ;                       ; l1bmm $lbi $lt
# Write to DRAM
iadd $aluf $lbf $nowrite ; l1bmd $aluf $lb0
iadd $aluf $lt  $nowrite ; l1bmd $aluf $lb256
iadd $aluf $lt  $nowrite ; l1bmd $aluf $lb512
iadd $aluf $lt  $nowrite ; l1bmd $aluf $lb768 ; l2bmd $lb0   $lc0
iadd $aluf $lt  $nowrite ; l1bmd $aluf $lb0   ; l2bmd $lb256 $lc256
iadd $aluf $lt  $nowrite ; l1bmd $aluf $lb256 ; l2bmd $lb512 $lc512
iadd $aluf $lt  $nowrite ; l1bmd $aluf $lb512 ; l2bmd $lb768 $lc768
                         ; l1bmd $aluf $lb768 ; l2bmd $lb0   $lc1024
                                              ; l2bmd $lb256 $lc1280
                                              ; l2bmd $lb512 $lc1536
                                              ; l2bmd $lb768 $lc1792
nop
mvd/n2048  $lc0  $p0@0
mvp/n16384 $p0@0 $d0@0
 
 
הההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההה
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Standard Output

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ACCEPTED!! score=24 j=22 m=2 bytes=1637
 
 
הההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההה
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

Standard Error

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------------------- vsm --------------------
# step     : 3 (12-15)
# peid_hi  : 2 (10-12)
# l1bid_hi : 2 (8-10)
# l2bid    : 3 (5-8)
# l1bid_lo : 1 (4-5)
# peid_lo  : 3 (1-4)
# word     : 1 (0-1)
# 0:
# $r[0-5] = 0xcc0e0006
imm      ui"0xcc0e0006" $lr0v/1110
# 1:
# ALU:  $aluf = $peid << 6
# L1BM: $lbi  = 1
# MAU:  $omr1 = 0x5555
ilsl     $peid  $aluf   $nowrite   ; l1bmrior   $aluf $lb0 ;                           ; hvpassar $aluf $omr1             ; hmwrite      $aluf $llx0
# 2:
# ALU:  $lt     = ($peid << 6) | $peid
# L1BM: $s[0-3] = 1
#       $lr4    = 0xcc0e0006_00000001
ior      $peid  $aluf   $lt        ;                       ; l1bmm $lbi $ls0v/1100 $r5 ;                                  ; hmwrite      $llr0 $llx8
 
 
הההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההה
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX