Inversion

Submission Date: 2024/9/15 13:52:35

Status: Accepted

Author: kurgm

Lines: 103

VSM

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
ipackbit $l1bid $ls0 $lt
imm f"1.0" $lr256/1000
iinc $lmt0 $ls128v; fmwrite $aluf $lx0
isub $lmt4094v4094 $aluf $omr1; fmwrite $lr256 $lx4
isub $lmt4086v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fmread/$imr1 $lx0 $lr136v; iinc $lmt16 $ls128v
fvpassa $lr128v $nowrite; isub $lmt14v4094 $aluf $omr1
fvadd $lr136v $mauf $nowrite; isub $lmt6v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvpassa $mauf $nowrite; isub $lmt4094v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt4086v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; fmread/$imr1 $lx0 $lr136v; iinc $lmt32 $ls128v
fvadd $lr128v $mauf $nowrite; isub $lmt30v4094 $aluf $omr1
fvadd $lr136v $mauf $nowrite; isub $lmt22v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvpassa $mauf $nowrite; isub $lmt14v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt6v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; isub $lmt4094v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt4086v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; fmread/$imr1 $lx0 $lr136v; iinc $lmt48 $ls128v
fvadd $lr128v $mauf $nowrite; isub $lmt46v4094 $aluf $omr1
fvadd $lr136v $mauf $nowrite; isub $lmt38v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvpassa $mauf $nowrite; isub $lmt30v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt22v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; isub $lmt14v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt6v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; isub $lmt4094v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt4086v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; fmread/$imr1 $lx0 $lr136v; iinc $lmt64 $ls128v
fvadd $lr128v $mauf $nowrite; isub $lmt62v4094 $aluf $omr1
fvadd $lr136v $mauf $nowrite; isub $lmt54v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvpassa $mauf $nowrite; isub $lmt46v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt38v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; isub $lmt30v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt22v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; isub $lmt14v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt6v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; isub $lmt4094v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt4086v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; fmread/$imr1 $lx0 $lr136v; iinc $lmt80 $ls128v
fvadd $lr128v $mauf $nowrite; isub $lmt78v4094 $aluf $omr1
fvadd $lr136v $mauf $nowrite; isub $lmt70v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvpassa $mauf $nowrite; isub $lmt62v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt54v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; isub $lmt46v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt38v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; isub $lmt30v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt22v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; isub $lmt14v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt6v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; isub $lmt4094v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt4086v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; fmread/$imr1 $lx0 $lr136v; iinc $lmt96 $ls128v
fvadd $lr128v $mauf $nowrite; isub $lmt94v4094 $aluf $omr1
fvadd $lr136v $mauf $nowrite; isub $lmt86v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvpassa $mauf $nowrite; isub $lmt78v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt70v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; isub $lmt62v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt54v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; isub $lmt46v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt38v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; isub $lmt30v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt22v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; isub $lmt14v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt6v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; isub $lmt4094v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt4086v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; fmread/$imr1 $lx0 $lr136v; iinc $lmt112 $ls128v
fvadd $lr128v $mauf $nowrite; isub $lmt110v4094 $aluf $omr1
fvadd $lr136v $mauf $nowrite; isub $lmt102v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvpassa $mauf $nowrite; isub $lmt94v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt86v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; isub $lmt78v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt70v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; isub $lmt62v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt54v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; isub $lmt46v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt38v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; isub $lmt30v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt22v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; isub $lmt14v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt6v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; isub $lmt4094v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite; isub $lmt4086v4094 $ls128 $omr1; fmread/$imr1 $lx0 $lr128v
fvadd $lr136v $mauf $nowrite; fmread/$imr1 $lx0 $lr136v
fvadd $lr128v $mauf $nowrite
fvadd $lr136v $mauf $lr0v
fftoi $mauf $lr16v
nop
iadd $lr12v $aluf $lr16v
nop
iadd $lr14v $aluf $lr16v
nop/2
l1bmd $lr22 $lb0
nop/2
l2bmriiadd $lb0 $lc0
nop/3
l2bmb $lc0 $lb256
nop/2
l1bmd $lb256 $ln0v
 
 
הההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההה
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

Standard Output

1
ACCEPTED!! score=103 j=103 m=0 bytes=6865
 
 
הההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההה
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

Standard Error

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
------------------- vsm --------------------
# ======= In(0): ((16_MAB:1, 4_PE:1, 2_W:1), (64:1))@LM0 / UInt =======
d set $lm0m0p0 1 0000003000000055 # values=[48, 85] / UInt @[0,0],[1,0]
d set $lm2m0p0 1 000000100000000D # values=[16, 13] / UInt @[0,1],[1,1]
d set $lm4m0p0 1 0000006100000059 # values=[97, 89] / UInt @[0,2],[1,2]
d set $lm6m0p0 1 000000450000001B # values=[69, 27] / UInt @[0,3],[1,3]
d set $lm8m0p0 1 0000004500000056 # values=[69, 86] / UInt @[0,4],[1,4]
d set $lm10m0p0 1 000000610000004D # values=[97, 77] / UInt @[0,5],[1,5]
d set $lm12m0p0 1 0000004000000057 # values=[64, 87] / UInt @[0,6],[1,6]
d set $lm14m0p0 1 0000004900000001 # values=[73, 1] / UInt @[0,7],[1,7]
d set $lm16m0p0 1 0000005400000019 # values=[84, 25] / UInt @[0,8],[1,8]
d set $lm18m0p0 1 000000040000000D # values=[4, 13] / UInt @[0,9],[1,9]
d set $lm20m0p0 1 000000010000003A # values=[1, 58] / UInt @[0,10],[1,10]
d set $lm22m0p0 1 0000001500000037 # values=[21, 55] / UInt @[0,11],[1,11]
d set $lm24m0p0 1 0000003800000006 # values=[56, 6] / UInt @[0,12],[1,12]
d set $lm26m0p0 1 0000004100000002 # values=[65, 2] / UInt @[0,13],[1,13]
d set $lm28m0p0 1 0000004900000016 # values=[73, 22] / UInt @[0,14],[1,14]
d set $lm30m0p0 1 0000006100000011 # values=[97, 17] / UInt @[0,15],[1,15]
d set $lm32m0p0 1 0000000F00000025 # values=[15, 37] / UInt @[0,16],[1,16]
d set $lm34m0p0 1 0000003200000062 # values=[50, 98] / UInt @[0,17],[1,17]
d set $lm36m0p0 1 000000260000000E # values=[38, 14] / UInt @[0,18],[1,18]
d set $lm38m0p0 1 000000550000003F # values=[85, 63] / UInt @[0,19],[1,19]
d set $lm40m0p0 1 0000004B00000058 # values=[75, 88] / UInt @[0,20],[1,20]
d set $lm42m0p0 1 000000570000001B # values=[87, 27] / UInt @[0,21],[1,21]
d set $lm44m0p0 1 0000002700000049 # values=[39, 73] / UInt @[0,22],[1,22]
d set $lm46m0p0 1 0000002500000026 # values=[37, 38] / UInt @[0,23],[1,23]
 
 
הההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההה
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX