Inversion

Submission Date: 2024/9/23 1:04:02

Status: Accepted

Author: yuidao

Lines: 407

VSM

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imm i"0" $s481
imm i"1" $s483
imm i"2" $s485
imm i"3" $s487
imm i"4" $s489
imm i"5" $s491
imm i"8" $s493
imm i"12" $s493
imm i"1" $ls496
imm ui"0xffffffff" $ls498
lpassa $peid $lls128v
nop
linc $ls128v $ls144v
l1bmd $ls128v $lb0
nop/2
l1bmp $lb0  $lr128v
l1bmp $lb4  $lr136v
l1bmp $lb8  $lr144v
l1bmp $lb12 $lr152v
l1bmp $lb16 $lr160v
l1bmp $lb20 $lr168v
l1bmp $lb24 $lr176v
l1bmp $lb28 $lr184v
l1bmp $lb32 $lr192v
l1bmp $lb36 $lr200v
l1bmp $lb40 $lr208v
l1bmp $lb44 $lr216v
l1bmp $lb48 $lr224v
l1bmp $lb52 $lr232v
l1bmp $lb56 $lr240v
l1bmp $lb60 $lr248v
lsub $lr128v $ls144v $omr1
lpassa $ls496 $lr256v/$imr1
lsub $lr136v $ls144v $omr1
lpassa $ls496 $lr264v/$imr1
lsub $lr144v $ls144v $omr1
lpassa $ls496 $lr272v/$imr1
lsub $lr152v $ls144v $omr1
lpassa $ls496 $lr280v/$imr1
lsub $lr160v $ls144v $omr1
lpassa $ls496 $lr288v/$imr1
lsub $lr168v $ls144v $omr1
lpassa $ls496 $lr296v/$imr1
lsub $lr176v $ls144v $omr1
lpassa $ls496 $lr304v/$imr1
lsub $lr184v $ls144v $omr1
lpassa $ls496 $lr312v/$imr1
lsub $lr192v $ls144v $omr1
lpassa $ls496 $lr320v/$imr1
lsub $lr200v $ls144v $omr1
lpassa $ls496 $lr328v/$imr1
lsub $lr208v $ls144v $omr1
lpassa $ls496 $lr336v/$imr1
lsub $lr216v $ls144v $omr1
lpassa $ls496 $lr344v/$imr1
lsub $lr224v $ls144v $omr1
lpassa $ls496 $lr352v/$imr1
lsub $lr232v $ls144v $omr1
lpassa $ls496 $lr360v/$imr1
lsub $lr240v $ls144v $omr1
lpassa $ls496 $lr368v/$imr1
lsub $lr248v $ls144v $omr1
lpassa $ls496 $lr376v/$imr1
llsl $l2bid $ls486 $nowrite
ladd $l1bid $aluf $ls152v
lxor $ls128v $aluf $omr1
lpassa $ls498 $ls160v/$imr1
nop/2
land $lm0v   $ls160v $lr0v
land $lm8v   $ls160v $lr8v
land $lm16v  $ls160v $lr16v
land $lm24v  $ls160v $lr24v
land $lm32v  $ls160v $lr32v
land $lm40v  $ls160v $lr40v
land $lm48v  $ls160v $lr48v
land $lm56v  $ls160v $lr56v
land $lm64v  $ls160v $lr64v
land $lm72v  $ls160v $lr72v
land $lm80v  $ls160v $lr80v
land $lm88v  $ls160v $lr88v
land $lm96v  $ls160v $lr96v
land $lm104v $ls160v $lr104v
land $lm112v $ls160v $lr112v
land $lm120v $ls160v $lr120v
msl $lr0v   $nowrite
lor $lr0v   $aluf $lr0v
msl $lr8v   $nowrite
lor $lr8v   $aluf $lr8v
msl $lr16v  $nowrite
lor $lr16v  $aluf $lr16v
msl $lr24v  $nowrite
lor $lr24v  $aluf $lr24v
msl $lr32v  $nowrite
lor $lr32v  $aluf $lr32v
msl $lr40v  $nowrite
lor $lr40v  $aluf $lr40v
msl $lr48v  $nowrite
lor $lr48v  $aluf $lr48v
msl $lr56v  $nowrite
lor $lr56v  $aluf $lr56v
msl $lr64v  $nowrite
lor $lr64v  $aluf $lr64v
msl $lr72v  $nowrite
lor $lr72v  $aluf $lr72v
msl $lr80v  $nowrite
lor $lr80v  $aluf $lr80v
msl $lr88v  $nowrite
lor $lr88v  $aluf $lr88v
msl $lr96v  $nowrite
lor $lr96v  $aluf $lr96v
msl $lr104v $nowrite
lor $lr104v $aluf $lr104v
msl $lr112v $nowrite
lor $lr112v $aluf $lr112v
msl $lr120v $nowrite
lor $lr120v $aluf $lr120v
msl $lr0v   $nowrite
lor $lr0v   $aluf $lr0v
msl $lr8v   $nowrite
lor $lr8v   $aluf $lr8v
msl $lr16v  $nowrite
lor $lr16v  $aluf $lr16v
msl $lr24v  $nowrite
lor $lr24v  $aluf $lr24v
msl $lr32v  $nowrite
lor $lr32v  $aluf $lr32v
msl $lr40v  $nowrite
lor $lr40v  $aluf $lr40v
msl $lr48v  $nowrite
lor $lr48v  $aluf $lr48v
msl $lr56v  $nowrite
lor $lr56v  $aluf $lr56v
msl $lr64v  $nowrite
lor $lr64v  $aluf $lr64v
msl $lr72v  $nowrite
lor $lr72v  $aluf $lr72v
msl $lr80v  $nowrite
lor $lr80v  $aluf $lr80v
msl $lr88v  $nowrite
lor $lr88v  $aluf $lr88v
msl $lr96v  $nowrite
lor $lr96v  $aluf $lr96v
msl $lr104v $nowrite
lor $lr104v $aluf $lr104v
msl $lr112v $nowrite
lor $lr112v $aluf $lr112v
msl $lr120v $nowrite
lor $lr120v $aluf $lr120v
msl $lr0v   $nowrite
lor $lr0v   $aluf $lr0v
msl $lr8v   $nowrite
lor $lr8v   $aluf $lr8v
msl $lr16v  $nowrite
lor $lr16v  $aluf $lr16v
msl $lr24v  $nowrite
lor $lr24v  $aluf $lr24v
msl $lr32v  $nowrite
lor $lr32v  $aluf $lr32v
msl $lr40v  $nowrite
lor $lr40v  $aluf $lr40v
msl $lr48v  $nowrite
lor $lr48v  $aluf $lr48v
msl $lr56v  $nowrite
lor $lr56v  $aluf $lr56v
msl $lr64v  $nowrite
lor $lr64v  $aluf $lr64v
msl $lr72v  $nowrite
lor $lr72v  $aluf $lr72v
msl $lr80v  $nowrite
lor $lr80v  $aluf $lr80v
msl $lr88v  $nowrite
lor $lr88v  $aluf $lr88v
msl $lr96v  $nowrite
lor $lr96v  $aluf $lr96v
msl $lr104v $nowrite
lor $lr104v $aluf $lr104v
msl $lr112v $nowrite
lor $lr112v $aluf $lr112v
msl $lr120v $nowrite
lor $lr120v $aluf $lr120v
l1bmrliadd $lr0v   $lb0
l1bmrliadd $lr8v   $lb16
l1bmrliadd $lr16v  $lb32
l1bmrliadd $lr24v  $lb48
l1bmrliadd $lr32v  $lb64
l1bmrliadd $lr40v  $lb80
l1bmrliadd $lr48v  $lb96
l1bmrliadd $lr56v  $lb112
l1bmrliadd $lr64v  $lb128
l1bmrliadd $lr72v  $lb144
l1bmrliadd $lr80v  $lb160
l1bmrliadd $lr88v  $lb176
l1bmrliadd $lr96v  $lb192
l1bmrliadd $lr104v $lb208
l1bmrliadd $lr112v $lb224
l1bmrliadd $lr120v $lb240
nop/2
l1bmm $llb0   $llr0v
l1bmm $llb32  $llr16v
l1bmm $llb64  $llr32v
l1bmm $llb96  $llr48v
l1bmm $llb128 $llr64v
l1bmm $llb160 $llr80v
l1bmm $llb192 $llr96v
l1bmm $llb224 $llr112v
nop/2
dmwrite $lr0v $lx0
dmread $lx0 $ls256v
dmwrite $lr8v $lx0
dmread $lx0 $ls264v
dmwrite $lr16v $lx0
dmread $lx0 $ls272v
dmwrite $lr24v $lx0
dmread $lx0 $ls280v
dmwrite $lr32v $lx0
dmread $lx0 $ls288v
dmwrite $lr40v $lx0
dmread $lx0 $ls296v
dmwrite $lr48v $lx0
dmread $lx0 $ls304v
dmwrite $lr56v $lx0
dmread $lx0 $ls312v
dmwrite $lr64v $lx0
dmread $lx0 $ls320v
dmwrite $lr72v $lx0
dmread $lx0 $ls328v
dmwrite $lr80v $lx0
dmread $lx0 $ls336v
dmwrite $lr88v $lx0
dmread $lx0 $ls344v
dmwrite $lr96v $lx0
dmread $lx0 $ls352v
dmwrite $lr104v $lx0
dmread $lx0 $ls360v
dmwrite $lr112v $lx0
dmread $lx0 $ls368v
dmwrite $lr120v $lx0
dmread $lx0 $ls376v
l1bmm@0 $ls256v8 $lb256
l1bmm@0 $ls288v8 $lb272
l1bmm@0 $ls320v8 $lb288
l1bmm@0 $ls352v8 $lb304
nop/2
l1bmd $lb256 $ls384v
nop/2
lpassa $ls384 $ls0v
nop/2
isub $lr0v $ls0v $omr1
ipassa $ls480 $lr256v/$imr1
isub $lr8v $ls0v $omr1
ipassa $ls480 $lr264v/$imr1
isub $lr16v $ls0v $omr1
ipassa $ls480 $lr272v/$imr1
isub $lr24v $ls0v $omr1
ipassa $ls480 $lr280v/$imr1
isub $lr32v $ls0v $omr1
ipassa $ls480 $lr288v/$imr1
isub $lr40v $ls0v $omr1
ipassa $ls480 $lr296v/$imr1
isub $lr48v $ls0v $omr1
ipassa $ls480 $lr304v/$imr1
isub $lr56v $ls0v $omr1
ipassa $ls480 $lr312v/$imr1
isub $lr64v $ls0v $omr1
ipassa $ls480 $lr320v/$imr1
isub $lr72v $ls0v $omr1
ipassa $ls480 $lr328v/$imr1
isub $lr80v $ls0v $omr1
ipassa $ls480 $lr336v/$imr1
isub $lr88v $ls0v $omr1
ipassa $ls480 $lr344v/$imr1
isub $lr96v $ls0v $omr1
ipassa $ls480 $lr352v/$imr1
isub $lr104v $ls0v $omr1
ipassa $ls480 $lr360v/$imr1
isub $lr112v $ls0v $omr1
ipassa $ls480 $lr368v/$imr1
isub $lr120v $ls0v $omr1
ipassa $ls480 $lr376v/$imr1
l1bmrliadd $lr256v $lb320
l1bmrliadd $lr264v $lb336
l1bmrliadd $lr272v $lb352
l1bmrliadd $lr280v $lb368
l1bmrliadd $lr288v $lb384
l1bmrliadd $lr296v $lb400
l1bmrliadd $lr304v $lb416
l1bmrliadd $lr312v $lb432
l1bmrliadd $lr320v $lb448
l1bmrliadd $lr328v $lb464
l1bmrliadd $lr336v $lb480
l1bmrliadd $lr344v $lb496
l1bmrliadd $lr352v $lb512
l1bmrliadd $lr360v $lb528
l1bmrliadd $lr368v $lb544
l1bmrliadd $lr376v $lb560
nop/2
l1bmd $lb320 $lr384v
# l1bmd $lb352 $lr390v
# l1bmd $lb384 $lr396v
# l1bmd $lb416 $lr402v
# l1bmd $lb448 $lr408v
# l1bmd $lb480 $lr414v
# l1bmd $lb512 $lr420v
# l1bmd $lb544 $lr426v
nop/2
l1bmrliadd $lr384v $lb576
nop/2
l1bmd $lb576 $lr392v
nop/2
l1bmrliadd $lr392v $lb576
nop/2
l1bmd $lb576 $lr400v
nop/2
ipassa $lr400v $lr408v
msl $lr400v $lr400v
nop/2
iadd $lr408 $aluf $lr408v
msl $lr400v $lr400v
nop/2
iadd $lr408 $aluf $lr408v
msl $lr400v $lr400v
nop/2
iadd $lr408 $aluf $lr408v
nop/2
l1bmrliadd $lr408v $lb592
nop/2
l1bmp $lb592 $lr416v
#
lpassa $peid $nowrite
llsr $aluf $ls486 $nowrite
llsl $aluf $ls484 $ls168v
lpassa $peid $nowrite
land $aluf $ls488 $nowrite
llsl $aluf $ls486 $nowrite
ladd $ls168v $aluf $nowrite
ladd $subpeid $aluf $ls168v
#
lpassa $l1bid $nowrite
llsr $aluf $ls484 $ls152v
llsl $aluf $ls490 $ls152v
lpassa $l1bid $nowrite
land $aluf $ls486 $nowrite
ladd $ls152v $aluf $ls152v
lpassa $l2bid $nowrite
llsl $aluf $ls484 $nowrite
ladd $ls152v $aluf $ls152v
#
lxor $ls168v $aluf $omr1/1000
lpassa $lr416v $lr448v/$imr1
nop/2
#
l1bmd $lr448v $lb0
nop/2
# l2bmd $lb0 $lc0
l2bmrliadd $lb0 $lc0
nop/2
mvp/n64 $lc0@0.0 $d0@0
mvp/n64 $lc0@0.1 $d64@0
mvp/n64 $lc0@1.0 $d128@0
mvp/n64 $lc0@1.1 $d192@0
mvp/n64 $lc0@2.0 $d256@0
mvp/n64 $lc0@2.1 $d320@0
mvp/n64 $lc0@3.0 $d384@0
mvp/n64 $lc0@3.1 $d448@0
nop/2
mvp/n512 $d0@0 $lc0@0.0
nop/2
l2bmb $lc0   $lb0
l2bmb $lc64  $lb64
l2bmb $lc128 $lb128
l2bmb $lc192 $lb192
l2bmb $lc256 $lb256
l2bmb $lc320 $lb320
l2bmb $lc384 $lb384
l2bmb $lc448 $lb448
nop/2
l1bmd $lb0   $lr456v
l1bmd $lb256 $lr464v
nop/2
lpassa $lr456v $nowrite
iadd $lr458v $aluf $lr472v
iadd $lr460v $aluf $lr472v
iadd $lr462v $aluf $lr472v
iadd $lr464v $aluf $lr472v
iadd $lr466v $aluf $lr472v
nop/2
iadd $lr468v $aluf $lr472v
nop/2
iadd $lr470v $aluf $lr472v
nop/2
lpassa $lr472 $ln0
 
 
הההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההה
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

Standard Output

1
ACCEPTED!! score=407 j=398 m=9 bytes=8484
 
 
הההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההההה
XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

Standard Error

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------------------- vsm --------------------
# ======= In(0): ((16_MAB:1, 4_PE:1, 2_W:1), (64:1))@LM0 / UInt =======
d set $lm0m0p0 1 0000003000000055 # values=[48, 85] / UInt @[0,0],[1,0]
d set $lm2m0p0 1 000000100000000D # values=[16, 13] / UInt @[0,1],[1,1]
d set $lm4m0p0 1 0000006100000059 # values=[97, 89] / UInt @[0,2],[1,2]
d set $lm6m0p0 1 000000450000001B # values=[69, 27] / UInt @[0,3],[1,3]
d set $lm8m0p0 1 0000004500000056 # values=[69, 86] / UInt @[0,4],[1,4]
d set $lm10m0p0 1 000000610000004D # values=[97, 77] / UInt @[0,5],[1,5]
d set $lm12m0p0 1 0000004000000057 # values=[64, 87] / UInt @[0,6],[1,6]
d set $lm14m0p0 1 0000004900000001 # values=[73, 1] / UInt @[0,7],[1,7]
d set $lm16m0p0 1 0000005400000019 # values=[84, 25] / UInt @[0,8],[1,8]
d set $lm18m0p0 1 000000040000000D # values=[4, 13] / UInt @[0,9],[1,9]
d set $lm20m0p0 1 000000010000003A # values=[1, 58] / UInt @[0,10],[1,10]
d set $lm22m0p0 1 0000001500000037 # values=[21, 55] / UInt @[0,11],[1,11]
d set $lm24m0p0 1 0000003800000006 # values=[56, 6] / UInt @[0,12],[1,12]
d set $lm26m0p0 1 0000004100000002 # values=[65, 2] / UInt @[0,13],[1,13]
d set $lm28m0p0 1 0000004900000016 # values=[73, 22] / UInt @[0,14],[1,14]
d set $lm30m0p0 1 0000006100000011 # values=[97, 17] / UInt @[0,15],[1,15]
d set $lm32m0p0 1 0000000F00000025 # values=[15, 37] / UInt @[0,16],[1,16]
d set $lm34m0p0 1 0000003200000062 # values=[50, 98] / UInt @[0,17],[1,17]
d set $lm36m0p0 1 000000260000000E # values=[38, 14] / UInt @[0,18],[1,18]
d set $lm38m0p0 1 000000550000003F # values=[85, 63] / UInt @[0,19],[1,19]
d set $lm40m0p0 1 0000004B00000058 # values=[75, 88] / UInt @[0,20],[1,20]
d set $lm42m0p0 1 000000570000001B # values=[87, 27] / UInt @[0,21],[1,21]
d set $lm44m0p0 1 0000002700000049 # values=[39, 73] / UInt @[0,22],[1,22]
d set $lm46m0p0 1 0000002500000026 # values=[37, 38] / UInt @[0,23],[1,23]
 
 
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