imm i"1" $s[256,257,256,256]
imm i"6" $s[254,255,254,254]
imm i"3" $s[252,253,252,252]
iand $lm0v $ls256 $lr0v
ilsr $lm0v $ls256 $lr200v
iand $aluf $ls256 $lr100v
ilsr $lr200v $ls256 $lr200v
iand $aluf $ls256 $nowrite
iadd $lr0v $aluf $lr0v
ilsr $lr200v $ls256 $lr200v
iand $aluf $ls256 $nowrite
iadd $lr100v $aluf $lr100v
ilsr $lr200v $ls256 $lr200v
iand $aluf $ls256 $nowrite
iadd $lr0v $aluf $lr0v
ilsr $lr200v $ls256 $lr200v
iand $aluf $ls256 $nowrite
iadd $lr100v $aluf $lr100v
ilsr $lr200v $ls256 $lr200v
iand $aluf $ls256 $nowrite
iadd $lr0v $aluf $lr0v
ilsr $lr200v $ls256 $lr200v
iand $aluf $ls256 $nowrite
iadd $lr100v $aluf $lr100v
iadd $lr0v $ls254 $lr0v
isub $aluf $lr100v $lr0v $ln0v
isub $aluf $ls254 $omr1
isub $lr0v $ls254 $lr0v/$imr1 $ln0v/$imr1
iand $lm8v $ls256 $lr8v
ilsr $lm8v $ls256 $lr208v
iand $aluf $ls256 $lr108v
ilsr $lr208v $ls256 $lr208v
iand $aluf $ls256 $nowrite
iadd $lr8v $aluf $lr8v
ilsr $lr208v $ls256 $lr208v
iand $aluf $ls256 $nowrite
iadd $lr108v $aluf $lr108v
ilsr $lr208v $ls256 $lr208v
iand $aluf $ls256 $nowrite
iadd $lr8v $aluf $lr8v
ilsr $lr208v $ls256 $lr208v
iand $aluf $ls256 $nowrite
iadd $lr108v $aluf $lr108v
ilsr $lr208v $ls256 $lr208v
iand $aluf $ls256 $nowrite
iadd $lr8v $aluf $lr8v
ilsr $lr208v $ls256 $lr208v
iand $aluf $ls256 $nowrite
iadd $lr108v $aluf $lr108v
iadd $lr8v $ls254 $lr8v
isub $aluf $lr108v $lr8v $ln8v
isub $aluf $ls254 $omr3
isub $lr8v $ls254 $lr8v/$imr3 $ln8v/$imr3
isub $lr0v $ls252 $omr2
isub $lr0v $ls252 $lr0v/$imr2 $ln0v/$imr2
isub $lr8v $ls252 $omr4
isub $lr8v $ls252 $lr8v/$imr4 $ln8v/$imr4
iand $lm16v $ls256 $lr16v
ilsr $lm16v $ls256 $lr216v
iand $aluf $ls256 $lr116v
ilsr $lr216v $ls256 $lr216v
iand $aluf $ls256 $nowrite
iadd $lr16v $aluf $lr16v
ilsr $lr216v $ls256 $lr216v
iand $aluf $ls256 $nowrite
iadd $lr116v $aluf $lr116v
ilsr $lr216v $ls256 $lr216v
iand $aluf $ls256 $nowrite
iadd $lr16v $aluf $lr16v
ilsr $lr216v $ls256 $lr216v
iand $aluf $ls256 $nowrite
iadd $lr116v $aluf $lr116v
ilsr $lr216v $ls256 $lr216v
iand $aluf $ls256 $nowrite
iadd $lr16v $aluf $lr16v
ilsr $lr216v $ls256 $lr216v
iand $aluf $ls256 $nowrite
iadd $lr116v $aluf $lr116v
iadd $lr16v $ls254 $lr16v
isub $aluf $lr116v $lr16v $ln16v
isub $aluf $ls254 $omr5
isub $lr16v $ls254 $lr16v/$imr5 $ln16v/$imr5
iand $lm24v $ls256 $lr24v
ilsr $lm24v $ls256 $lr224v
iand $aluf $ls256 $lr124v
ilsr $lr224v $ls256 $lr224v
iand $aluf $ls256 $nowrite
iadd $lr24v $aluf $lr24v
ilsr $lr224v $ls256 $lr224v
iand $aluf $ls256 $nowrite
iadd $lr124v $aluf $lr124v
ilsr $lr224v $ls256 $lr224v
iand $aluf $ls256 $nowrite
iadd $lr24v $aluf $lr24v
ilsr $lr224v $ls256 $lr224v
iand $aluf $ls256 $nowrite
iadd $lr124v $aluf $lr124v
ilsr $lr224v $ls256 $lr224v
iand $aluf $ls256 $nowrite
iadd $lr24v $aluf $lr24v
ilsr $lr224v $ls256 $lr224v
iand $aluf $ls256 $nowrite
iadd $lr124v $aluf $lr124v
iadd $lr24v $ls254 $lr24v
isub $aluf $lr124v $lr24v $ln24v
isub $aluf $ls254 $omr7
isub $lr24v $ls254 $lr24v/$imr7 $ln24v/$imr7
isub $lr16v $ls252 $omr6
isub $lr16v $ls252 $lr16v/$imr6 $ln16v/$imr6
isub $lr24v $ls252 $omr8
isub $lr24v $ls252 $lr24v/$imr8 $ln24v/$imr8